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first_img TSMC 3/2 nanometers and CoWoS remain tight, AWS and MediaTek's capacity allocation has changed

As we enter the late third quarter of 2026, TSMC's 3nm and 2nm advanced process and CoWoS advanced packaging capacity continue to be in high demand. NVIDIA and Apple continue to dominate the resources for advanced processes and packaging; Amazon AWS's Annapurna has recently increased its AI self-developed chip production, securing more 3nm capacity. MediaTek, in addition to mobile chips, is also competing for 2/3nm process and CoWoS-S/L capacity with large orders related to Google TPU.There are reports that TSMC has recently readjusted its capacity allocation. After MediaTek secured a large order from Google TPU, the next-generation TPU v9 will simultaneously use TSMC's CoWoS-L and Intel's EMIB-T, which has slightly adjusted MediaTek's 3nm and 2nm capacity arrangements. Currently, TSMC's main customer for 3nm is NVIDIA, which is expected to surpass Apple to become the largest customer by 2025; the demand for 2nm is primarily from Apple and others. After AWS increased Annapurna's production, its 3nm and CoWoS configuration priority has improved.Starting in early 2026, TSMC will accelerate capacity expansion, with the 2nm monthly capacity of Hsinchu Baoshan Fab 20 and Kaohsiung Fab 22 reaching 50,000 wafers each by the end of October, totaling about 100,000 wafers; by the end of October, the monthly capacity for 3nm in Tainan Science Park is about 185,000 wafers. As of the end of September, the overall capacity utilization rate is about 96.2%, with 100% utilization for processes below 16/12nm down to 2nm. The shortage of CoWoS supply has driven advanced packaging orders to overflow, with the priority for orders going to ASE Group's Siliconware Precision Industries first, followed by Amkor, and Chipbond, among others. Chipbond's related testing and packaging capacity is fully loaded, with order visibility extending to 2028.

first_img CXMT has launched the equipment bidding for the new factory in Shanghai and is planning to expand production in multiple locations

China's largest DRAM manufacturer Changxin Storage (CXMT) has recently launched a bidding for equipment from partners for its new factory in Shanghai and is advancing capacity expansion in multiple locations. CXMT is currently mass-producing DRAM in Hefei Phase II and Beijing Phase I, with an estimated capacity of about 200,000 wafers per month, which may exceed 300,000 wafers per month by the end of the year.CXMT plans to open the new factory in Shanghai in the fourth quarter of this year, and the related equipment bidding has already started. Semiconductor equipment industry insiders say that the factory is planned to be expanded in two phases, with capacity significantly exceeding 100,000 wafers per month. Subsequently, there are plans to open a new factory in Hefei in the first half of next year and the earliest new factory in Beijing in the second half of next year, with another new factory in Hefei opening in the first half of the year after next.Equipment industry insiders say that CXMT has communicated with multiple parties regarding the timing of building factories in various locations. If all plans are realized, CXMT could add at least 70,000 to 80,000 wafers of capacity per month each year from this year until 2028, with a long-term goal of exceeding 600,000 wafers per month. Samsung Electronics and SK Hynix's DRAM capacities are estimated at about 700,000 wafers and 600,000 wafers per month, respectively.
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